1. Field of the Invention
The present invention relates to a field emission electron source that emits an electron beam through strong electric field emission using a semiconductor material, and its production and use, and is an improvement of U.S. patent application Ser. No. 09/140,647 (Field emission electron source array, and its production and use), now U.S. Pat. No. 6,249,080, issued Jun. 19, 2001, of which the contents are incorporated in their entirety herein by reference.
2. Description of the Related Art
The present inventors proposed a planar field emission electron source produced by forming a porous polycrystal silicon layer that is processed by thermal oxidation on an electrically conductive substrate, and forming surface electrodes made of thin metal films on the thermally oxidized porous polycrystal silicon layer (Japanese Patent Application No. 65592/1998). The field emission electron source emits electrons through the surface of the surface electrode by applying a direct current voltage across the surface electrode and the conductive substrate, with the surface electrode serving as the positive electrode, and applying a direct current voltage across the surface electrode and a collector electrode that is disposed to oppose the surface electrode, with the surface electrode serving as the negative electrode.
A display apparatus that utilizes the field emission electron source of this type comprises a glass substrate 33 disposed to oppose the surface electrodes 7 of the field emission electron source 10xe2x80x2 as shown in FIG. 22, while collector electrodes 31 formed in the form of stripes on a surface of the glass substrate 33 that opposes the field emission electron source 10xe2x80x2, and a phosphor layer 32 formed to cover the collector electrode 31 for emitting visible light when irradiated with electron beams emitted by the surface electrodes 7. The field emission electron source 10xe2x80x2 has a thermally oxidized porous polycrystal silicon layer 6 formed on an n-type silicon substrate 1xe2x80x2 that is an electrically conductive substrate, and surface electrodes 7 formed in stripes on the porous polycrystal silicon layer 6. The n-type silicon substrate 1xe2x80x2 has an ohmic electrode 2 formed on the back surface thereof.
In the display apparatus described above, it is necessary to apply a voltage selectively to regions from which it is desired to emit electrons in order to emit electrons from predetermined regions of the planar field emission electron source 10xe2x80x2.
Thus in the display apparatus of this type, the surface electrodes 7 are formed in the configuration of stripes and the collector electrodes 31 are formed in the configuration of stripes that cross the surface electrodes 7 at right angles, so that electrons are emitted only from those of the surface electrode 7 to which a voltage is applied, by selecting some of the collector electrodes 31 and some of the surface electrodes 7 and applying the voltage (strong electric field) therebetween. Of the electrons emitted, only those electrons emitted from the region of the surface electrodes 7 opposing the collector electrode 31 to which the voltage is applied are accelerated, thereby to cause the phosphor covering the collector electrode 31 to emit light. To sum up, in the display apparatus of the configuration shown in FIG. 22, light is emitted from the phosphor layer 32 only at a portion thereof corresponding to that where the electrodes 7, 31 to which the voltage is applied intersect each other, by applying the voltage to the particular surface electrode 7 and the particular collector electrode 31. By switching the surface electrode 7 and the collector electrode 31 to which the voltage is applied, images or characters can be displayed. In the display apparatus described above, however, it is necessary to accelerate the electrons by applying a high voltage to the collector electrode 31 in order to cause the phosphor layer 32 to emit light with the electrons emitted by the field emission electron source 10xe2x80x2, and a high voltage of several hundreds to several thousands of volts is usually applied to the collector electrode 31 in the case of the display apparatus using the field emission electron source.
However, it is necessary to switch a high voltage of several hundreds to several thousands of volts applied to the collector electrode 31 in the case of the display apparatus using the field emission electron source 10xe2x80x2 of the configuration shown in FIG. 22, thus giving rise to such a problem that a surge voltage generated when switching the high voltage requires it to use a switching element that has a high withstanding voltage that leads to a higher cost. Furthermore, assuming a collector current of 1 mA flowing in the collector electrode 31 and a collector voltage of 1 kV applied, for example, a switching element having a capability of 1 W is required for each of the collector electrodes 31, mere switching elements provided for the number of collector electrodes 31 become very bulky.
Under the above circumstances, the present invention has been made, and a first object thereof is to provide a field emission electron source that is capable of emitting electrons selectively from a desired region of surface electrodes without switching the collector electrodes to which a high voltage is applied, and a method of producing the same.
In order to achieve the first object described above, the present invention provides a field emission electron source comprising an electrically conductive substrate having a lower electrode which may be formed from a conductive layer located on at least one of principal surfaces; a strong electric field drift layer formed on the conductive layer of the electrically conductive substrate; and surface electrodes consisting of a thin conductive film formed on the strong electric field drift layer, wherein electrons are injected from the electrically conductive substrate into the strong electric field drift layer and are drifted and emitted through the thin conductive film by applying a voltage across the thin conductive film and the conductive layer of the electrically conductive substrate with the thin conductive film serving as a positive electrode, wherein the conductive layer provided on the conductive substrate is formed from a plurality of stripes extending in parallel to each other at predetermined intervals and the thin conductive film is formed from a plurality of stripes extending in parallel to each other at predetermined intervals to oppose and cross the stripes of the conductive layer via the strong electric field drift layer; and wherein the strong electric field drift layer is a porous polycrystal semiconductor layer that is oxidized or nitrized, with the conductive layer and the thin conductive film hold the strong electric field drift layer therebetween at each position where the strips of the conductive layer and the stripes of the thin conductive film that oppose each other intersect, thereby forming a plurality of electron sources arranged at predetermined intervals on the conductive substrate.
By selecting the lower electrode and the surface electrode and applying a voltage to them, electrons can be emitted only from a selected region of the surface electrode to which the lower electrodes cross. Therefore, firstly it is made possible to emit electrons only from a desired region of the surface electrodes. Also secondly it is made possible to eliminate a circuit that switches a high voltage of several hundreds to several thousands of volts applied to the collector electrode in case of a display apparatus having such a configuration as the collector electrodes is disposed to oppose the surface electrode. Thus the present invention has an advantage to reduce the size and cost of the field emission electron source array that is capable of selectively emitting electrons from a desired region of the surface electrode.
The term xe2x80x9cconductive substatexe2x80x9d herein refers to a substrate having a conductive layer for serving as a negative electrode of the field emission electron source provided on a principal surface thereof and also having a strength to support a polycrystal semiconductor layer that is laminated thereon in vacuum. Usually, the term xe2x80x9cconductive substratexe2x80x9d means a substrate having an n-type impurity-doped conductive layer formed in a predetermined region of a p-type semiconductor layer that forms one of the principal surfaces in the case of p-type semiconductor, and also means a substrate having a metal layer formed thereon in the case of an insulating substrate. The metal layer that constitutes the conductive layer or the conductive layer doped with the n-type impurity is formed on the substrate in a configuration of stripes disposed at predetermined intervals. In the case of an insulating substrate, such a configuration may also be employed, as a matter of course, by making a semiconductor layer having conductive layers comprising an impurity diffision layer on the insulating substrate.
In case that a conductive layer is formed on a semiconductor layer, it is preferable that an impurity layer of the opposite polarity (conductivity type) to the conductive layer is formed so that leak current does not flow across the conductive layers. In case that a p-type semiconductor is used as the substrate, usually, the conductive layer is made as an n-type impurity layer and the layer that isolates it is made as a p-type impurity layer. To make a large-sized substrate, it is desirable to use an insulating substrate such as glass and form a conductive layer as a metal film by vapor deposition or the like. The stripes of the conductive layer are each several tens to several thousands of micrometers in width and disposed in parallel to each other at intervals of several hundreds of micrometers. Thickness of the conductive layer is from several hundreds of angstroms to several micrometers in the case of a metal, and several micrometers in the case of a diffusion layer.
On the other hand, while the polycrystal semiconductor layer may be made of a polycrystal material of a IV group element such as Si, Ge or C, compound of IVxe2x80x94IV elements SiC, compound of III-V elements such as GaAs, GaN or InP, compound of II-VI elements ZnSe or other polycrystal semiconductor, polycrystal silicon is preferable since it can be made porous by anodic oxidation (anodization) and an insulation film can be formed easily on the crystal surface by subsequent oxidation or nitrization step, thereby to form a strong electric field drift layer. Detailed description of the strong electric field drift layer is given in the U.S. patent application Ser. No. 09/140,647, Japanese Patent Application Nos. 272342/1998 and 115707/1999 and the content is incorporated herein by reference.
In order to prevent current leakage from occurring between drift layers, a p-type impurity can be doped between the strong electric field drift layers when using a substrate having a p-type semiconductor layer, or preferably an insulating layer is formed on the top thereof thereby to shut off current leakage. Also a portion or a part of the semiconductor may be removed from between the strong electric field drift layers by etching, so that an insulating layer may be formed on the inner surface of the groove thereafter, or the etched space may be filled with an insulating layer.
The strong electric field drift layer can be formed by forming the polycrystal semiconductor layer on the conductive substrate, applying anodic oxidation thereto, thereby to turn the entire polycrystal semiconductor layer or an upper portion thereof located on the conductive layer into a porous structure, and then oxidizing or nitriding the porous portions. It is made easier to make the whole layer porous, when a portion where the strong electric field drift layer is to be formed is masked and the other portions are removed by etching and then subjected to anodization. There are described conditions for forming the strong electric field drift layer on the conductive substrate, conditions for anodization and oxidation or nitrization, in case of the polycrystal semiconductor of polycrystal silicon, in detail in the U.S. patent application Ser. No. 09/140,647.
As described above, in case the portion between neighboring strong electric field drift layers among the polycrystal semiconductor layer that constitute the strong electric field drift layer is removed by etching thereby to expose the principal surface of the semiconductor substrate and the insulation film is formed on the principal surface of at least the exposed semiconductor substrate, insulation between the neighboring strong electric field drift layers can be improved. When a silicon substrate is used for the semiconductor substrate, it is preferable to use an n-type diffusion layer for the conductive layer and an silicon oxide layer for the insulating layer. In a preferred embodiment, stripes of silicon nitride film are formed on the principal surface of a p-type silicon substrate and, after forming a silicon oxide layer by selectively oxidizing the portion of the principal surface of a p-type silicon substrate that is not covered by the silicon nitride film and removing the silicon nitride film, an n-type region is formed between the neighboring silicon oxide layers on the principal surface side in the p-type silicon substrate, a polycrystal semiconductor layer is formed on the n-type region, anodic oxidation process is carried out to make the polycrystal semiconductor layer porous, the porous polycrystal semiconductor layer is oxidized to form the strong electric field drift layer, and surface electrodes comprising thin metal film that cross the n-type region are formed on the strong electric field drift layer.
In the field emission electron source array described above, when the conductive layer (for example, n-type region) and the strong electric field drift layer are formed in the configuration of stripes on the conductive substrate, there is a possibility of leak current flowing between the conductive layers or between the strong electric field drift layers When such a leak current flows, electrons are emitted from the surface electrode located above the conductive layer where no voltage is applied, thus making a cause of cross-talk in a display apparatus, thus giving rise to a possibility of preventing the selective emission of electrons from the desired region of the surface electrodes.
A second object of the present invention is, accordingly, to provide a field emission electron source array that can be reduced in size and produced at a reduced cost, wherein electrons can be emitted selectively from the desired region of the surface electrodes while preventing leak current from flowing.
According to the present invention, in order to achieve the second object described above, first, when the conductive substrate is formed from a semiconductor layer in the field emission electron source array, a high-concentration impurity diffusion layer is provided between the conductive layers (impurity diffusion layers) formed on the principal surface side thereof The high-concentration impurity diffusion layer is provided between the diffusion layers thereby to prevent leak current from flowing between the diffusion layers.
Second, a p-type impurity is doped into the polycrystal semiconductor layer between the strong electric field drift layers thereby to form a p-type region and prevent leak current from flowing between the strong electric field drift layers. In this case, it is practical to interpose an insulating layer in the interface between the surface electrode and the polycrystal semiconductor layer that is doped with the p-type impurity, thereby to prevent leak current from flowing from the conductive substrate via the polycrystal semiconductor layer to the surface electrode.
Third, instead of providing the polycrystal semiconductor layer, that is formed between the strong electric field drift layers, in the p-type region, an isolation groove positioning in the direction of thickness may be provided in a part of the portion between the surface electrodes and/or in a part of the portion between the conductive layers by removing the strong electric field drift layer or the polycrystal semiconductor layer between the strong electric field drift layers by means of etching. The inner surface of the isolation groove may be coated with an isolation layer or the inner space of the isolation groove may be filled with the insulation material to improve the isolation, thereby to prevent leak current from flowing between the strong electric field drift layers. Leak current can also be prevented from flowing from the conductive substrate to the surface electrode or between the surface electrodes.
Fourth, when a back electrode connected to the semiconductor substrate is provided on the back side of the semiconductor substrate, leak current can be prevented from flowing between the conductive layers by controlling the potential of the semiconductor substrate using the back electrode.
Fifth, when an insulating layer is provided between the conductive substrate and the polycrystal semiconductor layer, leak current from the semiconductor substrate and the semiconductor layer through the polycrystal semiconductor layer to the surface electrode or the adjacent strong electric field drift layer can be prevented.
In case the conductive layer is formed as an impurity diffusion layer on the principal surface side in the conductive substrate, it is practical to provide high-concentration impurity layers on both sides of the impurity diffuision region in the direction of width. It is preferable that the impurity diffusion layer is provided as an n-type region on the p-type semiconductor substrate, and therefore an n+ layer having higher concentration of impurity than the n-type region is provided to adjoin therewith. This configuration makes it possible to reduce the total resistance of the n-type portion even when the impurity concentration of the n-type region is decreased, since the n-type region and the n+ layer adjoin with each other. Furthermore, when an n++ layer of a higher impurity concentration is provided in the n+ layer, convergence of strong electric field can be prevented thereby improving the insulation withstanding voltage.
When the surface electrodes are disposed across the strong electric field drift layer, electrons emitted from the strong electric field drift layer via the surface electrodes may be impeded from running straight.
Thus a third object of the present invention is to provide a field emission electron source having improved performance of selectively emitting electrons from a desired region of the surface electrode while maintaining the straightness (rectilinear propagation) of the electron traveling direction.
According to the present invention, in order to prevent cross-talk from occurring between the adjoining strong electric field drift layers, the polycrystal semiconductor layer between the strong electric field drift layers is removed or the degree of insulation between the strong electric field drift layers is increased by doping the p-type impurity in a high concentration. While these methods are effective in maintaining the straightness of the electron traveling direction, in order to further ensure the straightness, first, the surface electrodes disposed across the strong electric field drift layers are formed in such a configuration that the portion thereof located on the polycrystal semiconductor layer has a width smaller than that of the portion located on the strong electric field drift layer, thereby improving the straightness of the electron traveling direction than in the case where width of the surface electrode is constant over the entire length. Second, straightness of the electron traveling direction can be improved also by forming the surface electrode in such a configuration that the portion thereof that does not overlap the strong electric field drift layer has larger thickness than the portion that overlaps the strong electric field drift layer in the direction of thickness, thereby preventing electrons from penetrating therethrough. Third, when the insulation film is provided between the surface electrode and the polycrystal semiconductor layer, straightness of the emitted electrons traveling direction is maintained and cross-talk can be reduced. Moreover, when the insulation film is provided on the portion of the surface electrode that does not overlap the electron drift layer, straightness of the emitted electrons traveling direction can be further ensured.
Also providing the insulating layer causes a step to be generated between the insulating layer and the portion of the polycrystal semiconductor layer located between the strong electric field drift layers. Since it is necessary for the electrons that have drifted through the strong electric field drift layer to pass through the surface electrode, the surface electrodes are formed from thin metal film. As a consequence, the thin metal film formed over the step is likely to break. Therefore, it is practical to form the insulating layer in such a configuration as the thickness at both ends in the direction of width gradually decreases toward the end and decrease the step between the polycrystal semiconductor layer surface and the strong electric field drift layer surface, thereby to prevent breakage of the surface electrode due to the formation of the insulating layer. In case a silicon substrate is used for the semiconductor substrate, the insulating layer can the formed relatively simply by LOCOS method that is employed in the steps of MOS devices and the like, with stable configuration of the insulating layer. It is also made possible to further prevent the sure electrode from breaking and restrain the increase of the electrical resistance by increasing the thickness of the surface electrode made of the thin conductive film formed on regions other than the strong electric field drift layer. Furthermore, since the surface electrode is thin and has a high electrical resistance, Joule heat due to the current flowing therein and Joule heat due to the current flowing in the strong electric field drift layer generate significant heat. Thus it is preferable to provide wiring electrodes for electrical and thermal connection separately from the surface electrode. By making the wiring electrode thicker than the surface electrode, electrical resistance of the surface electrode can be decreased and the operation characteristics can be stabilized. It is preferable to select optimum materials, that are different from each other, for the wiring electrode and the surface electrode. It is also practical to provide an insulating layer below the wiring electrode thereby to prevent ineffective current due to electrons entering directly into the wiring layer.
Preferred embodiments for producing the field emission electron source of the configuration described above will be described below. While the description will make reference to the drawings that show semiconductor substrates being used, an electron source employing an insulating substrate can be formed with the same method except for forming a metal film as a conductive layer on the insulating substrate.
The method of producing the electron source array of the present invention comprises the steps of:
(A) forming a plurality of stripes of conductive layer disposed in parallel to each other at predetermined intervals as lower electrodes on one of the principal surfaces of a conductive substrate;
(B) forming a polycrystal semiconductor layer that covers the conductive layer formed on the principal surface of the conductive substrate;
(C) applying anodic oxidation (anodization) selectively to a part of the polycrystal semiconductor layer to turn it into a porous material by using the conductive layer as one of the electrodes;
(D) oxidizing or nitriding the polycrystal semiconductor layer that has been made porous; and
(E) forming a plurality of stripes of thin conductive films disposed in parallel to each other at predetermined intervals to oppose and cross the stripes of the conductive layer on the oxidized or nitrided polycrystal semiconductor layer a part of which has been made porous.
The step of applying anodic oxidation selectively to the part of the polycrystal semiconductor layer formed in the step (B) to make it porous may include a step of forming a masing material layer that opens in predetermined regions for applying anodic oxidation on the polycrystal semiconductor layer.
In case the substrate is a semiconductor, the step (A) of forming a plurality of stripes of conductive layer preferably comprises a step (a-1) of masking the surfaces other than a predetermined region, for the purpose of doping, of the substrate having a p-type semiconductor layer on the principal surface or the p-type semiconductor substrate, and a step (a-2) of doping the predetermined region described above with an n-type impurity thereby to form an n-type impurity diffusion layer.
The step (A) of forming a plurality of stripes of conductive layer may further include a step (a-3) of forming an insulating layer on a p-type conductive substrate whereon the n-type impurity diffusion layer described above has been formed, and making openings of insulating layer in the predetermined regions of the n-type impurity diffusion layer.
The step of applying anodic oxidation selectively to a part of the polycrystal semiconductor layer formed in step (C) to turn it into a porous material is preferably a step of applying anodic oxidation by using the electrode provided on the back surface of the semiconductor substrate as one of anodizing electrodes.
The method according to the present invention may include a step (F) of introducing an impurity, of a conductivity type opposite to that of the diffusion layer that constitutes the conductive layer, to between the porous polycrystal semiconductor layers adjoining each other thereby to form a polycrystal semiconductor layer of a conductivity type opposite to that of the conductive layer, and a step (G) of forming an insulation film on the polycrystal semiconductor layer of the conductivity type opposite to that of the conductive layer.
The step, of etching away a part or whole of the semiconductor layer between the neighboring conductive layers and the semiconductor layer, where the thin conductive film is not to be formed, may be carried out either after or before the anodic oxidation process.
Also before the anodic oxidation process, a step of forming a plurality of stripes of insulating layer disposed in parallel to each other at predetermined intervals to oppose and cross the conductive layer on the polycrystal semiconductor layer may be included, while anodic oxidation to turn the polycrystal semiconductor layer into a porous material is carried out at predetermined intervals along the conductive layer. The step described above may be carried out under the conditions described in the U.S. patent application Ser. No. 09/140,647.
Specific embodiments as described below are proposed.
The first method is shown in FIG. 1A through FIG. 1G
A semiconductor substrate 1 of p-type conductivity is prepared (FIG. 1A) whercon a predetermined mask 9 is formed. An n-type impurity is doped through an opening 8 and a conductive layer 8 that serves as a lower electrode is formed in a configuration of stripes disposed at predetermined intervals (FIG. 1B).
Then a polycrystal semiconductor layer 3 is formed (FIG. 1C). Portions other than that to be porous are covered by a first mask 16-1FIG. 1D) and, after forming an electrode layer 2 on the back surface of the substrate 1, the substrate is immersed in an electrolysis solution to carry out electrolysis with a constant current by using the electrode layer 2 as an anode thereby to apply anodic oxidation of the predetermined region, resulting in a porous layer indicated by 6 (FIG. 1E). Crystal in the porous region is oxidized or nitrized to turn it into a strong electric field drift layer 6. The drawings show a state of the entire strong electric field drift layer 6 being turned into porous polycrystal semiconductor layer by oxidation or nitrization, but only the upper portion may be turned into porous polycrystal semiconductor layer by oxidation or nitrization depending on the conditions of electrolysis.
A thin metal film 7 that serves as a surface electrode is formed on the polycrystal semiconductor layer 3 that includes the strong electric field drift layer 6 (FIG. 1F), and an insulation film 16-2 to make a second mask is formed on the thin metal film 7 in a region other than the strong electric field drift layer 6, thereby to ensure straightness of the electron traveling direction (FIG. 1G).
The second method comprises steps shown in FIG. 2A through FIG. 4D and FIG. 4G branching out of the step shown in FIG. 1B of the first method.
After doping an n-type impurity to form a conductive layer 8 on the semiconductor substrate 1, a mask 9 is once removed (FIG. 2A) and then the polycrystal semiconductor layer 3 is formed (FIG. 2B). Portions other than that to be made porous are covered by the first mask 16-1 (FIG. 2C) and, after forming the electrode layer 2 on the back surface of the substrate 1, the substrate is immersed in an electrolysis solution to carry out electrolysis using the electrode layer 2 as an anode thereby to apply anodic oxidation to the predetermined region, resulting in a porous layer indicated by 6 (FIG. 2D). Then the crystal in the porous region is oxidized or nitrized to make the strong electric field drift layer 6. The strong electric field drift layer 6 of the polycrystal semiconductor layer 3 is covered by a third mask 16-3 (FIG. 2E), the polycrystal semiconductor layer other than the strong electric field drift layer is removed by etching, the insulating layer 9 is deposited between the etched-away strong electric field drift layers 6 (FIG. 2F), the insulation film 16-3 of the third mask located on the strong electric field drift layers 6 is removed (FIG. 4D) and the thin metal film 7 that serves as the surface electrode is formed thereon (FIG. 4E), thereby forming an electron source.
The third method comprises steps shown in FIG. 3A through FIG. 3F branching out of the step shown in FIG. 1C of the first method.
After doping an n-type impurity to form the conductive layer 8 on the semiconductor substrate 1 (FIG. 1B), the polycrystal semiconductor layer 3 is formed (FIG. 1C). Portions other than that to be made porous are covered by the third mask 16-3 (FIG. 3A) and the polycrystal semiconductor layer other than the strong electric field drift layer is removed by etching (FIG. 3B). Then after removing the insulation film 16-3 of the third mask located on the strong electric field drift layers 6 (FIG. 3C) and forming the electrode layer 2 on the back surface of the substrate 1, the substrate is immersed in an electrolysis solution to carry out electrolysis using the electrode layer 2 as an anode with a constant current thereby to apply anodic oxidation to the predetermined region, resulting in a porous region indicated by 6 (FIG. 3D). Crystal in the porous region is oxidized or nitrized to turn it into the strong electric field drift layer 6. The thin metal film 7 that serves as the surface electrode is formed on the strong electric field drift layer 6 of the polycrystal semiconductor layer 3 (FIG. 3E), and the thin metal film 7 other than the strong electric field drift layer 6 is covered by an insulation film of the second mask 16-2 thereby to secure the straightness of the electron traveling direction (FIG. 3F), thus forming an electron source.
A variation of the third method comprises steps proceeding from FIG. 2G to FIG. 2C, FIG. 2D, FIG. 2H and to FIG. 2I, branching out of the step shown in FIG. 2B of the second method.
After doping an n-type impurity to form the conductive layer 8 on the semiconductor substrate 1, the mask 9 is once removed FIG. 2A) and then the polycrystal semiconductor layer 3 is formed (FIG. 2B). Portions other than that to be made porous are covered by the third mask 16-3 (FIG. 2G), and the portion other than that to be made porous is doped with a p-type impurity, the mask 16-3 is removed and the portion other than that to be made porous are covered by the first mask 16-1 (FIG. 2C). Then after forming the electrode layer 2 on the back surface of the substrate 1, the substrate is immersed in an electrolysis solution to carry out electrolysis using the electrode layer 2 as an anode with a constant current thereby to apply anodic oxidation to the predetermined region, resulting in a porous layer indicated by 6 (FIG. 2D). Crystal in the porous region is further oxidized or nitrized to turn it into the strong electric field drift layer 6.
The thin metal film 7 that serves as the surface electrode is formed on the polycrystal semiconductor layer 3 that includes the strong electric field drift layer 6 (FIG. 2H), and portion of the thin metal film 7 other than the strong electric field drift layer 6 is covered by insulation film of the second mask 16-2 thereby to secure the straightness of the electron traveling direction (FIG. 2I).
The fourth method comprises steps shown in FIG. 4A through FIG. 4E branching out of the step shown in FIG. 1E of the first method.
The first mask 16-1, located on the polycrystal semiconductor layer 3 whereon anodic oxidation was applied in FIG. 1E and the strong electric field drift layer 6 was formed by oxidation or nitrization, is removed (FIG. 4A), the strong electric field drift layer 6 of the polycrystal semiconductor layer 3 is covered by the third mask 16-3 (FIG. 4B), the polycrystal semiconductor layer other than the strong electric field drift layer is removed by etching FIG. 4C), the insulation film of the third mask 16-3 on the strong electric field drift layer 6 is removed (FIG. 4D) and the thin metal film 7 that serves as the surface electrode is formed thereon (FIG. 4E), thereby forming the electron source.
The fifth method comprises the steps shown in FIG. 5A through FIG. 5I.
Preliminary mask 14 is formed in a configuration of stripes on the principal surface side of the p-type silicon substrate 1 (FIG. 5B), and an insulating layer 15 comprising a silicon oxide film is formed by LOCOS method (FIG. 5C). The n-type region 8 is formed in stripes by using the insulating layer 15 as a mask to dope the p-type silicon substrate with the n-type impurity on the principal surface side (FIG. 5D), and the polycrystal semiconductor layer 3 is formed on the n-type region and on the insulating layer (FIG. 5E). The portion other than that to which anodic oxidation is to be applied is covered by the first mask 16-1 (FIG. 5F) and the portion of the polycrystal semiconductor layer 3 located on the n-type region is turned into a porous region by anodic oxidation process using the n-type region 8 as the electrode (FIG. 5G). The polycrystal semiconductor layer which has been made porous is oxidized to form the strong electric field drift layer 6, Then the surface electrodes comprising thin conductive films are formed in a configuration of stripes extending over the strong electric field drift layer and the polycrystal semiconductor layer (FIG. 5H). Last, the thin metal film 7 other than the strong electric field drift layer 6 is covered by the insulation film 16-2 of the second mask thereby to secure the straightness of the electron traveling direction (FIG. 5I).
Since the method described above is capable of forming the n-type region (conductive layer) in the configuration of stripes by introducing the n-type impurity on the principal surface side of the p-type silicon substrate using the insulating layer made of the silicon oxide film formed by the LOCOS method as the mask, the step of separately forming the mask for forming the n-type region becomes unnecessary, and the accuracy of the relative positions of the n-type region and the insulating layer can be improved. Also because the strong electric field drift layer can be formed by turing the portion of the polycrystal semiconductor layer located on the n-type region into a porous region by anodic oxidation process using the n-type region as the electrode and oxidizing or nitriding the polycrystal semiconductor layer that has been made porous, thus positional accuracy of the n-type region and the strong electric field drift layer is improved and, as a result, it is made possible to provide the field emission electron source wherein electrons can be emitted only from a desired region of the surface electrode and adjoining strong electric field drift layers are isolated from each other.
The sixth method comprises steps shown in FIG. 6A through FIG. 6F and continued in FIG. 4D and FIG. 4E, branching out of the step shown in FIG. 1B of the first method.
After doping an n-type impurity to form the conductive layer 8 on the semiconductor substrate 1, the first mask 16-1 is once removed (FIG. 6A), a high-concentration layer 17 is formed by heavily doping p-type impurity between the adjoining conductive layers 8 for the isolation thereof, and double layers 18, 19 are formed by doping an n-type impurity to both ends of the conductive layer so that the impurity concentration becomes higher toward the inside, thereby decreasing the resistance of the conductive layer. Other steps are the same as those shown in FIG. 2, and the polycrystal semiconductor layer 3 is formed (FIG. 6B). Portions other than that to be made porous are covered by the first mask 16-1 (FIG. 6C) and, after forming the electrode layer 2 on the back surface of the substrate 1, the substrate is immersed in an electrolytic solution to carry out electrolysis using the electrode layer 2 as an anode with a constant current, thereby to apply anodic oxidation to the predetermined region, resulting in a porous layer indicated by 6 (FIG. 6D). Crystal in the porous region is oxidized or nitrized to turn it into a strong electric field drift layer 6. The strong electric field drift layer 6 of the polycrystal semiconductor layer 3 is covered by the third mask 16-3 (FIG. 6E), the polycrystal semiconductor layer other than the strong electric field drift layer is removed by etching (FIG. 6F), the insulation film 16-3 of the third mask on the strong electric field drift layer 6 is removed (FIG. 4D) and the thin metal film 7 that serves as the surface electrode is formed thereon (FIG. 4E), thereby forming the electron source.